Code: D-09                                                                           Subject: DIGITAL ELECTRONICS

Time: 3 Hours                                                                     Flowchart: Alternate Process: December 2005                                Max. Marks: 100

 

NOTE: There are 9 Questions in all.

·      Question 1 is compulsory and carries 20 marks. Answer to Q. 1. must be written in the space provided for it in the answer book supplied and nowhere else.

·      Out of the remaining EIGHT Questions answer any FIVE Questions. Each question carries 16 marks.

·      Any required data not explicitly given, may be suitably assumed and stated.

 

 

Q.1       Choose the correct or best alternative in the following:                                         (2x10)

       

a.       The decimal equivalent of Binary number 11010 is

 

                   (A)  26.                                               (B)  36.

(C)    16.                                              (D)  23.

       

b.      1’s complement representation of decimal number of -17 by using 8 bit representation is

 

(A)    1110 1110                                   (B)  1101 1101

(C)  1100 1100                                   (D)  0001 0001

            

             c.   The excess 3 code of decimal number 26 is

                  

(A)    0100 1001                                   (B)  01011001

(C)  1000 1001                                   (D)  01001101

 

             d.   How many AND gates are required to realize Y =  CD+EF+G

 

                   (A) 4                                                   (B)  5

(C) 3                                                   (D)  2

 

             e.   How many select lines will a 16 to 1 multiplexer will have

                  

(A)     4                                                  (B)  3

(C)  5                                                  (D)  1

 

             f.    How many flip flops are required to construct a decade counter

 

(A)     10                                                (B)  3

(C)  4                                                  (D)  2

 

             g.   Which TTL logic gate is used for wired ANDing

 

(A) Open collector out put                   (B)  Totem Pole

(C)  Tri state output                             (D)  ECL gates

 

 

             h.   CMOS circuits consume power

 

(A)    Equal to TTL                                (B) Less than TTL

(C) Twice of TTL                                (D) Thrice of TTL

 

             i.    IC 7490 contains flip flops

 

(A)   4                                                  (B) 3

(C) 2                                                   (D) 10

 

             j.    In a RAM, information can be stored

 

(A)  By the user, number of times.       

(B)  By the user, only once.

(C)  By the manufacturer, a number of times.         

(D)  By the manufacturer only once.

 

 

Answer any FIVE Questions out of EIGHT Questions.

Each question carries 16 marks.

 

 

  Q.2     a.   Convert  decimal 177.25 to octal number.                                                          (8)

       

             b.   Perform following subtraction

                   (i)   11001-10110         using 1’s complement                                                        

                   (ii)  11011-11001         using 2’s complement                                                    (8)

       

  Q.3     a.   Reduce the following equation using k-map

                                                                            (8)

 

             b.   Write the expression for Boolean function

                    F (A, B, C)  = ∑m  (1,4,5,6,7) in standard POS form.                                       (8)          

 

  Q.4     a.   Explain working of three state TTL.                                                                    (8)

 

             b.   What do you mean by interfacing? Explain its need.  How will you interface TTL to CMOS?                                                                                                 (8)

 

  Q.5     a.   Explain the following characteristics for digital IC’s.                                            (8)

                  

                   (i) Propagation delay                            (ii) Power dissipation         

            

             b.   Design a 32:1 multiplexer using two 16:1 multiplexers and a 2:1 multiplexer.                        (8)


 

  Q.6     a.   Implement the following function using a 3 line to 8 line  decoder.

                   

                   S (A,B,C) =   ∑ m(1,2,4,7)

                   C (A,B,C) =  ∑ m ( 3,5,6,7)                                                                              (8)

 

             b.   How will you form an 8 bit adder using 2 four bit adder IC’s 7483?                    (8)

 

  Q.7     a.   Explain the operation of octal to binary encoder.                                                 (8)   

 

             b.   Explain the working of master slave JK flip flop.                                                 (8)

 

  Q.8     a.   Explain how Parallel In Serial Out (PISO) shift register works.                            (8)

 

             b.   Design a mod-6 up counter.                                                                               (8)

 

  Q.9     a.   Explain how EPROM memory cell works.                                                          (8)

 

             b.   Explain the working of dual slope A/D converter.                                                (8)