Code: DC-04 Subject: COMPUTER ORGANISATION

Time: 3 Hours Max. Marks: 100

NOTE: There are 11 Questions in all.

· Question 1 is compulsory and carries 16 marks. Answer to Q. 1. must be written in the space provided for it in the answer book supplied and nowhere else.

· Answer any THREE Questions each from Part I and Part II. Each of these questions carries 14 marks.

· Any required data not explicitly given, may be suitably assumed and stated.

Q.1 Choose the correct or best alternative in the following: (2x8)

a. An n-bit microprocessor has an

(A) n-bit program counter. (B) n-bit ALU.

(C) n-bit address register. (D) n-bit external data register.

b. can be represented in a signed magnitude format and in a 1’s complement format as

(A) 111011 & 100100 (B) 100100 & 111011

(C) 011011 & 100100 (D) 100100 & 011011

c. If a microprocessor enters in an infinite loop, then a way to make the microprocessor come out of this infinite loop is

(A) to interrupt the microprocessor. (B) to reduce the clock frequency.

(C) to make pin active. (D) to generate a system reset.

d. The instructions which copy information from one location to another either in the processor’s internal register set or in the external main memory are called

(A) Data transfer instructions.

(B) Program control instructions.

(C) Input-output instructions.

(D) Logical instructions.

e. If the value V(x) of the target operand is contained in the address field itself, the addressing mode is

(A) immediate. (B) direct.

(C) indirect. (D) implied.

f. A microprogram sequencer

(A) generates the address of next micro instruction to be executed.

(B) generates the control signals to execute a microinstruction.

(C) sequentially averages all microinstructions in the control memory.

(D) enables the efficient handling of a micro program subroutine.

g. The main memory in a Personal Computer (PC) is made of

(A) cache memory. (B) static RAM

(C) Dynamic Ram (D) both (A) and (B).

h. (2FAOC)₁₆ is equivalent to

(A) (195 084)₁₀ (B) (0010 11111010 0000 1100)₂

(C) both (A) and (B). (D) none of these.

PART I

Answer any THREE Questions. Each question carries 14 marks.

Q.2 a. Draw a neat block diagram of a 4-bit binary adder-subtractor. Then, explain its operation in detail. (7)

b. Show that the Exclusive-OR function x = D is an odd function. (4)

c. Given that , and . Express in terms of its min-terms. (3)

Q.3 a. What do you understand by a self-complementing code? Give an example of the self-complementing code. Write the self-complementing codes for 0 to 9. (5)

b. What are the various phases of an Instruction cycle? Give the micro-operations of fetch and decode phases. (5)

c. Explain the function of a control unit of a basic computer. (4)

Q.4 a. Design a 4-bit shift register, which is capable of shifting its binary information in both the directions along with the facility of parallel loading. (4)

b. Convert the following arithmetic expression from infix notation to Reverse Polish Notation (RPN).

(i) A+B*A+(B*E+A*D)

(ii) A*[C+(B*D)+(A*E)]

(iii) A*B/C+D (6)

c. Compare a static RAM with a dynamic RAM with respect to its speed, packing density, cost and power consumption. (4)

Q.5 a. What is the role of a stack in handling the interrupts? What is the difference between the stack and the normal read write memory. (5)

b. The value of two 8-bit numbers A and B is 11001100 and 00111001 respectively. Determine the contents of the flag register of the 8085 microprocessor after the subtraction of A and B is performed. (6)

c. An 8-bit register A has one binary input x. The cells of the register are numbered 1 through 8 from left to right. The register operation is described symbolically as follows:

What is the function of the register? (3)

Q.6 a. Write down the differences between a branch instruction, a call instruction and an interrupt? (8)

b. A digital computer has a common bus system for 8 registers of 8 bits each. The bus is constructed with multiplexers.

(i) How many selection inputs are there in each multiplexer?

(ii) What size of multiplexers are needed?

(iii) How many multiplexers are there in the bus? (6)

PART II

Answer any THREE Questions. Each question carries 14 marks.

Q.7 a. What do you understand by the term page fault? What is the need of having page replacement algorithms like first-in first out (FIFO) and the least recently used (LRU). (8)

b. Explain the difference between vectored interrupt and non-vectored interrupt. Explain with the help of a suitable example of each. (6)

Q.8 a. Discuss the differences between a hardwired control unit and a micro- programmed control unit. How a microprogrammed control unit is implemented. (7)

b. Explain the source-initiated and the destination-initiated handshaking methods of data transfer with the help of a neat diagram. What are the merits of interrupt driven data transfer method as compared to the above methods. (7)

Q.9 a. Explain the method of multiplication of two floating point numbers, with the help of a flow chart. (8)

b. A computer system has a main memory of 64 K 8 bytes and a cache memory of 1 K words. The cache uses direct mapping with a block size of 8 words.

(i) How many bits are required in tag and index fields of the address format?

(ii) How many bits are there in each word of cache, and how they are divided into functions. Include a valid bit. (6)

Q.10 a. Explain with the help of an example each of the following:

(i) Zero address instruction.

(ii) One address instruction.

(iii) Two address instruction and

(iv) Three address instruction. (8)

b. Consider the function f (a,b,c,d) that takes the value 1 if and only if the number of 1’s in b and c is greater than or equal to the number of 1’s in a and d.

(i) Write the truth for the function f.

(ii) Use an 8-to-1 multiplexer to implement the function f. (6)

Q.11 Write short notes on any TWO of the following:

(i) Associative memory.

(ii) Von Neumann architecture.

(iii) Addressing modes.

(iv) Instruction pipelining. (7+7)