Code: DC-04 Subject: COMPUTER ORGANISATION

Time: 3 Hours Max. Marks: 100

NOTE: There are 11 Questions in all.

Question 1 is compulsory and carries 16 marks. Answer to Q. 1. must be written in the space provided for it in the answer book supplied and nowhere else.

Answer any THREE Questions each from Part I and Part II. Each of these questions carries 14 marks.

Any required data not explicitly given, may be suitably assumed and stated.

Q.1 Choose the correct or best alternative in the following: (2x8)

a. The 2s compliment form (Use 6 bit word) of the number 1010 is

(A) 111100. (B) 110110.

(C) 110111. (D) 1011.

b. Cache Memory works on the principle of

(A) Locality of data. (B) Locality of memory.

(C) Locality of reference. (D) Locality of reference & memory.

c. What is the content of Stack Pointer (SP)?

(A) Address of the current instruction

(B) Address of the next instruction

(C) Address of the top element of the stack

(D) Size of the stack.

d. Which of the following interrupt is non maskable

(A) INTR. (B) RST 7.5.

(C) RST 6.5. (D) TRAP.

e. Which of the following is a main memory

(A) Secondary memory. (B) Auxiliary memory.

(C) Cache memory. (D) Virtual memory.

f. Which of the following are not a machine instructions

(A) MOV. (B) ORG.

(C) END. (D) (B) & (C).

g. In Assembly language programming, minimum number of operands required for an instruction is/are

(A) Zero. (B) One.

(C) Two. (D) Both (B) & (C).

h. The maximum addressing capacity of a micro processor which uses 16 bit database & 32 bit address base is

(A) 64 K. (B) 4 GB.

(C) both (A) & (B). (D) None of these.

PART I

Answer any THREE Questions. Each question carries 14 marks.

Q.2 a. Explain Von Neumann Architecture. What are its drawbacks ? (3+3)

b. What is meant by Addressing Mode? Explain at least five different Addressing Modes with an example. (2+6)

Q.3 a. Discuss the general characteristics of memory systems. What is the use of virtual memory and discuss its concept? (2+2+6)

b. How many ROM chips are required to produce a memory capacity of 4000 bytes? How many address lines are required to access the 4000 bytes? How many of these addresses will be common to all these chips?

(1+1+2)

Q.4 a. Draw the block diagram of Arithmetic Logic Unit (ALU) to perform the following operations. (use MUX) (Assume the length of the data).

(i) AND (ii) OR

(iii) NOR (iv) NAND (8)

b. Show the function table for above design and explain. (6)

Q.5 a. What is meant by pipelining? Why do we require instruction pipelining? Explain its working procedure. Discuss the pipeline performance measures.

(8)

b. What are the different conflicts that will arise in pipeline (elaborate)? How do

you remove the conflicts? (3+3)

Q.6 a. Explain how addition and subtraction of floating point operations are carried out with an example and show the algorithm / flow chart. (4+4)

b. What is meant by normalization? Why we do normalization of floating point numbers? (6)

PART II

Answer any THREE Questions. Each question carries 14 marks.

Q.7 a. Explain the role of stacks for handling interrupts. (4)

b. What is the sequence of steps that will take place when an interrupt occurs? (6)

c. Define hit ratio and explain its significance. (4)

Q.8 Show the hardware to be used for addition and subtraction of signed 2s compliment representation. Explain how it operates and how an over flow will be handled. (14)

Q.9 a. What is an instruction? What are the different parts of an instruction? Explain the significance of each part of an instruction with an example? (8)

b. If a Computer has 128 operation codes and 512 k addresses, how many bits would be required for

(i) Single address instruction (ii) Two address instruction. (6)

Q.10 What are the different modes of data transfer? Explain the DMA Controller with a block diagram. What is meant by block transfer? (2+10+2)

Q.11 a. Explain the different shift operations with examples. What is the status of flag bit in each case? (7)

b. A personal computer has main memory of bytes and cache memory of 512 words. The cache is directly mapped with block size of 4 words.

(i) How many bits are required in tag, index block and word fields of the address format?

(ii) Show the addressing format?

(iii) What are the advantages of direct addressing scheme? (3+2+2)